Apple announced this week new MacBook Pro computers featuring the M5, M5 Pro, and M5 Max SoCs. These new chips, at least for the Pro and Max versions, introduce a completely new approach to Apple Silicon. They are no longer based on a single die but instead are two dies (chiplets) connected together with Apple’s brand-new Fusion Architecture. The base M5 chip is not.
We have seen the Fusion technology Apple has used in the past for creating the “Ultra” versions of its M1, M2, and M3 chips. It skipped the M4 Ultra to focus on re-engineering Apple Silicon for the M5 line. Apple says this is the biggest chip design update since the original M-series debuted.
In this article, we will dive into details that others may miss and highlight the relevance of these chips to the AEC markets.
M5 Pro and Max
The M5 Pro and M5 Max are interesting because now the fusion technology is deployed between the Pro and Max, whereas previously it was deployed between the Max and Ultra. More than that, the division is between CPU and GPU, where before an entire Max chip was doubled using Apple Fusion to create the Ultra version.
Apple’s M5 Pro and M5 Max introduce a totally new Apple Silicon architectural strategy and industry-leading chip performance.
This time, the CPU for the Pro and Max is essentially the same, just binned with one core each, but the GPU die is doubled to get the Max variant from the Pro.
- The M5 Pro –
- 5/6 – super cores
- 10/12 performance cores (18 core total max)
- 16/20 GPU cores
Or the:
- M5 Max –
- 6 – super cores
- 12 – performance cores (18 cores total)
- 32/40 GPU cores
Apple explicitly says in its press release that the “M5 Max pairs the 18-core CPU with an up-to-40-core GPU.” So the CPU and GPUs are definitely their own dies, and the GPU dies come in two sizes, and Apple may have engineered them so they are cuttable at the wafer level to control how many of each-sized GPU die they need.
Fusion Architecture Details
The new Fusion Architecture connects two dies with advanced IP blocks and maintains high bandwidth and low latency using advanced packaging. Exactly which sub-components on which die isn’t fully clear.
M5 Pro chip diagram (not official), based on Apple’s descriptions of the Apple Fusion Architecture. (Image: screen grab from Gary Explains, with Architosh-added text)
To make this efficient at the wafer level, the CPU and GPU dies would likely want to be the same die size, unless Apple engineered its chiplet so that TSMC produced the CPU and GPU dies on separate wafer runs. But how Apple achieves this at the manufacturing level isn’t really our concern, and we may learn about it eventually.
Super Cores and P Cores Only
Another interesting aspect of the M5 Pro and M5 Max chips is that they feature only performance and super cores. There are no efficiency cores for the Pro and Max. This isn’t a full departure from ARM’s big.LITTLE architecture philosophy as the super cores are larger than the performance cores, but it signals that Apple is gunning to compete with chip competitors trying to nip at its heels, especially at multicore CPU performance.
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For instance, ARM competitor Qualcomm, with its Oryon architecture, only has “performance” and “prime” cores and explicitly omits traditional efficiency (or E) cores. Qualcomm’s thinking is that performance cores are efficient enough at low voltages to handle background tasks without needing purpose-built efficiency cores. Apple seems to have fully embraced this strategy as well, at least for the M5 Pro and M5 Max.
The GPU also features Neural Accelerators integrated into each GPU core. This is a game-changer for GPU performance and AI performance alike, and it shows in Apple’s AI benchmarks.
Node and Performance
The M5 Pro and M5 Max are manufactured on TSMC’s third-generation 3-nm process (N3P), which yields only a 4% improvement in transistor density but up to 30% faster multithreaded CPU performance, which is notable. GPU performance is also substantially faster than the M4 series. Even without the efficiency cores, the new node is helping Apple get up to 24 hours of battery life.
Another notable improvement is the memory speed-up. Bandwidth is now up to 307GB/s for the M5 Pro and 614GB/s for the M5 Max, with maximum memory of 64GB and 128GB, respectively.
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For graphics performance, the new chips feature enhanced shader cores with second-generation dynamic caching and hardware-accelerated mesh shading. Also, Apple’s third-generation ray-tracing engine is onboard these new chips, which will improve rendering performance across numerous AEC applications.
Massive Single-Core
Apple leads the world in single-core performance, and the new super cores are the world’s fastest yet. This is partly driven by increased front-end bandwidth (wider front end, new cache hierarchy, and new branch prediction technology. Apple remains hyper-focused on industry-leading IPC (instructions per clock), and the ultra-wide fetch and decoder can process more instructions simultaneously before they even reach the execution units.
Vectorworks Architect is showcased on Apple’s M5 Pro and M5 Max webpage. The application is a model of modern code development for OS-centric optimization across platforms, but especially macOS. Maxon’s Redshift rendering engine is also noted and featured in this image. These kinds of tools are highly single-threaded and dependent for main design modeling tasks.
At the same time, the 30% improvement in multicore CPU performance is also dramatic, and we will see how the M5 Max fairs against the leading Apple Silicon chip on multithreaded performance, the M3 Ultra.
AI Performance
But beyond Fusion, Apple’s strategy of placing a Neural Accelerator into every single GPU core is another major architectural change in Apple Silicon, yielding big results. Apple says the M5 Pro and M5 Max offer over 4x peak GPU compute for AI compared to the previous M4 generation of chips. This is massive.
Additionally, the Neural Engine itself is faster than previous versions, and these chips also boast the latest Media Engine for video workflows and an industry-first Memory Integrity Enforcement and Thunderbolt 5. Learn more here.
Architosh Analysis and Commentary
Apple Silicon has traditionally been strongest in IPC and single-core performance, an area we have emphasized is absolutely critical to the CAD industry because CAD and 3D software are intrinsically resistant to parallelization. The entire M5 chip family continues to place emphasis on this industry leadership, which is a boon for performance-hungry BIM and CAD professionals using macOS native CAD and BIM platforms, from AutoCAD to Vectorworks and everything in between.
It is notable that the M5 base model chip also features the same architecture core improvements, with four Super cores being paired with six Efficiency Cores. The base M5 chip maxes out its unified memory at 32 GB, which is the threshold you need to run Windows in Parallels in a professional AEC environment. This is the one regret we have, as a 48 GB option would have given the market a more affordable machine for contractors. They only need to run tools like Revit, SketchUp, and Bluebeam, along with web-based tools like Procore, but they are generally not authoring in tools like Revit.
For architects who need access to Windows apps like Revit but prefer working on the Mac, the MacBook Pro with M5 Pro at 48 GB is an ideal starting point for a powerful mobile workstation with industry-leading snappiness across all native applications.
Beyond all this, the new shader cores, third-gen ray-tracing engine, and Neural Accelerators in each GPU core all benefit visualization tools and workflows that architects and designers need.
