Apple’s event tomorrow will center on the Mac. But more than that it will introduce the bigger Apple Silicon chip strategy the company will deploy for the next few years. Apple’s introduction graphics should be familiar to all Star Wars fans. It’s the moment a spacecraft makes the jump to lightspeed.
This graphic is a telltale sign that Apple intends to blow past the entire industry in chip performance. So how do they intend to do that exactly? That’s what we focus on in this article. We will first summarize and then we will provide details for those who want to understand the tech behind the story.
The Summary
Apple’s A-series and M-series chips are SoCs, otherwise known as “system on a chip.” Its latest SoCs include the CPU, GPU, Neural Engine, and Memory, and much more directly on the same piece of silicon.
However, Apple will almost certainly jump to a SoIC type of semiconductor product tomorrow. SoIC stands for “system on integrated chips.” This technology is also known as “chiplets” and AMD is already first to the market with chiplet (SoIC) technology with its Ryzen 5000 series CPUs.
Chiplet technology is a new way to package a processor. If you have been wondering how Apple was going to scale up the unified memory on the M1 processor to meet the memory demands of its future professional Mac computers, chiplet technology is how you can get there. It is also the pathway to many more cores.
On Monday Apple will likely introduce the M1X (our name not Apple’s) as a chiplet. In one version the expected 10-core M1X will sit on an interposer layer in a SoIC package. The interposer is an electrical interface for routing between various components of the SoIC. Take a look at the patent graphic above.
Apple tomorrow will likely enter the chiplet (SoIC) era for Apple Silicon. Manufacturing challenges at smaller nodes are forcing the industry in the chiplet direction, and wafer yields favor small chips anyway. AMD has already led the way ahead of both Apple and Intel with a chiplet CPU implementation.
When the M1X is doubled up in chiplet design you can double both the GPU and CPU cores. If you place four M-series chiplets on a larger SoIC package, you have the processing power you need for the new Mac Pro towers. We believe that the Mac Pro, however, will feature the M2 chip in a chiplet package.
Details
Mark Gurman of Bloomberg has been one of the most reliable sources for the future of Apple products. In May of this year, Gurman wrote the new 14-inch and 16-inch MacBook Pro would be powered by two new chips code-named Jade C-Chop and Jade C-Die. Each will be 10-cores (8 high-performance cores and 2 energy-efficient cores). Both chips will come in 16 and 32 GPU core variants with up to 64GB of RAM.
But these are not different chips but rather TSMC will chop off half the GPU cores to arrive at a chiplet that is smaller. Or these will be binned chips that had defects with Apple disabling GPU cores or simply turning good cores off like in the M1 MacBook Air with its 7-core GPU.
Smaller chips are superior for better wafer yields. All wafers tend to have some small percentage of defective or low-performing chips—see red and purple squares. When a defect occurs on a large monolithic CPU chip, like Intel’s recent chips, the total wafer yield is far poorer than when the same number and type of defects occur on a wafer with a far greater number of smaller chips. The chiplet strategy will enable Apple to get optimal chip yields out of each TSMC wafer. And “binned” chips can still be used for throttling M1X performance options, allowing Apple to appear to be utilizing many CPUs when in fact they are actually only manufacturing one.
Therefore, the M1X may have several binned chip variants, enabling Apple to maximize wafer yields by offering versions of the chip with disabled defective cores. The M1X may come in 10-core and 8-core versions, with the latter still performing better than the M1 due to Apple moving to the TSMC 5NP process node (P is for the performance version of the 5nm node). Variants of the Jade C-Chop may come with 10, 12, and 14 GPU cores. We believe the Jade C-Die chip is a chiplet (SoIC) package with two (2x) M1X chips. Again, Apple can offer disabled binned variants with versions made for the larger 16-inch MacBook Pro offering 20, 24, or 28 GPU cores and possibly a 16 CPU core option.
With the new modularity of chiplet (SoIC) design, Apple can offer the market what seems like a plethora of chip and price options while only architecting and manufacturing a single M1X chip. The flagship version for the new MacBooks would likely be the Jade C-Die with 20 CPU cores, 32 GPU cores, and 64 GB of unified memory.
Mac Pro on M2
Gurman also writes that the new Mac Pro will have new chips dubbed Jade 2C-Die and Jade 4C-Die, in 20 and 40 core variants. What’s intriguing about these codenames is the numbers 2 and 4. Do they imply a doubling and quadrupling of the basic M1X chip? That would be the most logical notion. But what would the performance difference be between a Jade 2C-Die versus a Jade C-Die? The answer may lie in chip frequency.
Since the Mac Pro has completely different thermals as the enclosure is vastly larger than all the other types of Mac computers, Apple could afford to increase the clock frequencies of the M1X. Another explanation could be that Jade 2C-Die and Jade 4C-Die are chips built on the next 4nm or 3nm TSMC process. Since the next Mac Pro is due next year I think the Jade 2C-Die and 4C-Die are not built from M1X chiplets but rather M2 chiplets. That’s my guestimate based on the timing of the Taiwan Semiconductor Manufacturing Company (TSMC’s) 4nm node process.
Lightspeed
Bottom line? The new chiplet era for Apple Silicon is likely to begin tomorrow. They are following in AMD’s footsteps and the entire industry will ultimately have to go in this direction as well. But just imagine how much faster the M1X will be in its basic binned version, let alone its 10-core CPU / 16-core GPU and with 32GB of unified memory.
A basic indication is to look at the speed up of the A-15 Bionic over the A-14, both on 5nm cores. The A-15 however was built using the TSMC N5P node and gained, in the end, a larger performance increase than was first imagined. That iPhone 13 chip is faster than the M1. The M1X will benefit from the same TSMC N5P node improvements over the M1. It will also be larger than the M1 with likey about 30-40 percent more transistors. It will likely yield a 25-35 percent performance improvement in single-core performance. The real performance story, however, is the use of two of these M1X chiplets on a single die. This will scale multicore performance up dramatically north of 200 percent over the M1. And then later with the M2 chiplet in 4x formation, we may see Apple’s next Mac Pro become the most powerful workstation computer in the world by a long shot. This is what seems possible now.